AI ASIC Memory Compiler Engineer

Job Overview

Join MediaTek's Memory Design Automation team based in Singapore as a Memory Compiler Engineer focused on delivering optimized memory design kits and automation flows that support advanced technology nodes. This position involves collaboration with global memory design teams to develop high performance, low power, and compact memory solutions for ASIC design flows.

Key Responsibilities

• Develop behavioral, FPGA, timing, and DFT simulation models for memory designs.
• Debug and optimize SRAM models within ASIC design workflows.
• Collaborate on the development of memory compiler automation systems to ensure robust memory delivery.

Qualifications and Skills

• Familiarity with high performance, low power SRAM/ROM and VLSI design is advantageous.
• Proficiency in programming languages including Perl, Shell, Python, and C/C++.
• Experience or understanding of AI machine learning algorithms and supporting infrastructure is a plus.
• Strong knowledge of Verilog syntax across behavioral, RTL, and synthesizable domains.
• Understanding of Liberty timing format is required.
• Hands-on experience with EDA simulation tools such as VCS and NC.
• Knowledge of Electronic Design Automation (EDA) tools including:
• Design for Test (DFT) tools like Logicvision, Tessent, Fastscan
• Synthesis tools such as Design Compiler and Genus
• Simulation tools including VCS, QuestaSim, and NC
• Static Timing Analysis (STA) tools like PrimeTime