Synthesis Engineer

Job Overview

We are seeking an experienced Synthesis Engineer with over five years in the field. This role focuses on optimizing synthesis environments, ensuring synthesis SDC (synopsys design constraints) quality, and extracting optimal area and power for the given technology node.

Key Responsibilities

• Establish and configure the synthesis environment for projects.
• Validate the quality of synthesis SDC files to meet design standards.
• Leverage synthesis tool variables and methodologies to achieve minimal area and power consumption suitable for the process node.
• Evaluate synthesis DEF files for quality assurance.
• Investigate and resolve critical timing violation clusters and congestion by refining floorplan and placement constraints.
• Benchmark area and power metrics against prior projects and scrutinize ongoing results.
• Perform DFT (Design for Test) insertion and troubleshoot fundamental DFT issues.
• Collaborate closely with Design and Physical Design teams to enhance synthesis outcomes.

Qualifications and Requirements

• Minimum 5 years' experience in synthesis engineering.
• Proficiency in low power optimization techniques and clock gating logic power (CLP).
• Strong skills in conducting netlist level design quality analysis.
• Bachelor's or Master's degree with a solid foundation in VLSI.